Google and Qualcomm are changing Wear OS smartwatches foreve…

Over the next few years, the landscape of Wear OS smartwatches is about to change dramatically, thanks to a new partnership between Google and Qualcomm. The two companies have entered into an agreement to develop “RISC-V-based wearable solutions” for smartwatches powered by Google’s wearable operating system.

To put it in the simplest terms, expect a new wave of custom-designed processors based on a completely different coding architecture. However, the main objective is to produce wearable silicon that consumes less power but provides higher performance. “This expanded framework will help reduce time to market [manufacturers] While launching a smartwatch with advanced features, Qualcomm said in a press release.

Right now, all the mainstream processors you find in Wear OS smartwatches – like Qualcomm’s Wear series or Samsung’s Exynos portfolio – all rely on core designs provided by British firm Arm. The company charges licensing fees from its customers (Apple is one of them) and also lets them customize the main design to their liking in exchange for additional royalties.

RISC-V, being an open-source instruction set architecture, is not tied to any particular company. This means that once software is built using RISC-V, any company can freely use it to design semiconductors. This is expected to have a significant impact on the extent of the associated ecosystem.

Why is RISC-V a big deal for Wear OS?

While the cost is certainly an incentive for existing Wear OS ecosystem players to look for a cheaper alternative, there are a few other factors at play here too. Arm’s position as a company has not been stable recently. Its blockbuster acquisition by Nvidia was thwarted by regulators. Also, Arm’s feud with Qualcomm is well known, despite their deep partnership, especially in the computing ecosystem.

However, the biggest advantage of adopting RISC-V architecture is its open-source nature. This means that not only will stakeholders get free real estate, but there will be no barriers to chip optimization. Wear OS watches are not without their problems, especially when it comes to power draw and battery efficiency.

Another major benefit of open-source infrastructure is that it lowers the barrier for smaller and new players in the ecosystem, bringing more competitive devices to the table and adding to the diversity of options for an average buyer. There is already some precedent for RISC-V in the Google ecosystem. In 2021, PLCT Labs managed to boot Android on a 64-bit RISC-V core.

Giving a free hand to big players, especially players like Google and Qualcomm, can yield good results. Apple has done this not only with its iPhone and smartwatch chips within the Arm ecosystem, but it has also successfully reinvented the entire Mac silicon ecosystem to such an extent that it has left Intel and AMD far behind.

The seeds have already been sown

However, the latest partnership between Google and Qualcomm is not entirely unexpected. Top stakeholders in the wearable ecosystem – Google, Qualcomm, MediaTek and Samsung – are already on board the RISC-V Software Ecosystem (RISE) project. Supported by the Linux Foundation, the RISE project aims to accelerate the development of a “robust software ecosystem specifically for application processors”.

In August 2023, Qualcomm teamed up with other semiconductor players to establish a company focused on the RISC-V ecosystem. Its purpose is to “enable RISC-V based products, provide reference architectures, and help establish solutions that are widely used in the industry.” This new company will focus on mobile, Internet of Things (IoT) and automotive segments.

Luckily, we’ve already got a glimpse of the future. California-based SiFive last year developed two high-performance RISC-V processors targeted at wearables, AR/VR and IoT devices. In fact, Qualcomm and Samsung are already evaluating SiFive’s RISC-V processors for potential integration into their ecosystem of products.

Electronic Design notes that SiFive’s P670 already matches Arm’s Cortex-A78 core in performance, but in a package that’s half the size. The P470 is based on the Cortex-A55, but it leads to an even more compact profile and higher energy efficiency. ThinkSilicon has also developed a RISC-V-based GPU solution targeting smartwatches and AR/VR wearables.

There is a challenging, but rewarding road ahead

The future looks bright, but a hardware ecosystem only prospers with a rewarding software ecosystem, and this is where Google has a key role to play in the success of RISC-V. Google has already announced Android support for RISC-V with wearable devices, but as of now, only an emulator exists.

The world of application processors is extremely complex, and it will take some bold steps for RISC-V to have a lasting impact on the Wear OS ecosystem. Google could take some lessons from Apple here, as Apple has worked closely with developers to move away from Intel’s x86 architecture and switch to the Arm ecosystem for M-series processors for Macs.

There are many parties in the world of Wear OS need Working together for RISC-V to succeed on wearables. Both Google and Samsung have substantial experience with smartwatch software as well as custom silicon, while Qualcomm has served as the silicon supplier. The Google Pixel Watch 2 and Samsung Galaxy Watch 6 are great examples of how good Wear OS watches are today, and with this partnership, they’ll only get better.

As promising as it all sounds, the partnership could easily take a few years to materialize. Google will have to make it easier for developers to port Wear OS app code to the RISC-V ecosystem, while companies like Samsung and Qualcomm will have to figure out the hardware technology.

At the end of the day, it will take two to tango to meaningfully realize Wear OS on RISC-V. But the ultimate question is: “How badly do Google and Qualcomm want this to succeed?” I, for one thing, am not entirely sold on Google’s track record with such commitments, but I’m also eager to see a vibrant smartwatch ecosystem take shape in the near future.